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    Front-End Read-Out System for Radiation Scintillation Detector

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    Yun_grad.sunysb_0771E_10259.pdf (2.730Mb)
    Date
    1-Aug-10
    Author
    Yun, Xiao
    Publisher
    The Graduate School, Stony Brook University: Stony Brook, NY.
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    Abstract
    Detection of various nuclear radiation sources is increasinglyimportant for security issues. A novel three-dimensional (3D)integration of scintillation-type semiconductor radiation detectorpixels has been proposed. This dissertation presents a designmethodology of a low-power low-noise integrated front-end readoutsolution suitable for the proposed detector.The low-power low-noise front-end readout system contains a chargesensitive amplifier (CSA), a analog signal processing unit and ananalog-to-digital converter (ADC). The CSA isolates big parasiticcapacitor of the detector, and allows the electrons generated fromdetector to integrate on a smaller capacitor. The signal processingunit contains a high order semi-Gaussian pulse shaping filter and apeak detector. The shaping filter filters the output signal from CSAand maximizes the signal to noise ratio. The peak detector capturesthe peak amplitude from shaping filter, which is proportional to thenumber of input electrons. Noise model of the readout system isconstructed, and several noise optimization techniques are discussedto minimize the equivalent noise charge (ENC).The analog-to-digital converter required in the readout system needsto be low power, high absolute accuracy and tones-free. Extendedcounting analog-to-digital converter combines the accuracy ofdelta-sigma modulation and the speed of algorithmic conversion. Thisconversion architecture is shown to be useful in applications withmultiple sensory channels, where both resolution and speed aredemanded. A design of a 13 bit extended counting ADC is presented.This dissertation provides detail discussion on design andsimulation of each building block, comparison between differentarchitectures, and experimental results of prototype ASICs, whichare implemented through 0.5um CMOS process.
    URI
    http://hdl.handle.net/1951/55689
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